1. Field of the Invention
The present invention relates to a receiver circuit, and more particularly, to a receiver circuit including an equalizer circuit that performs intensity adjustment of a reception signal.
2. Description of Related Art
In recent years, a speed of communication that is performed between semiconductor devices has been increasing. In particular, there is a significant influence on signal intensities by a transmission path of signals when communication is performed by signals having high frequencies. Accordingly, a receiver circuit that receives such signals receives signals by an equalizer circuit that adjusts signal intensities, so as to transmit signals whose signal intensities are adjusted to a circuit located at the subsequent stage.
One example of a receiver circuit including such an equalizer circuit is disclosed in MAXIM, 10.7 Gbps Adaptive Receive Equalizer MAX3805 specification, Robert Payne et al., “A 6.25-Gb/s Binary Transceiver in 0.13-μm CMOS for Serial Data Transmission Across High Loss Legacy Backplane Channels” IEEE JOURNAL OF SOLID-STATE CIRCUITS, VOL. 40, No. 12, DECEMBER 2005 (Robert Payne et al.), and Yasuo Hidaka et al., “A 4-Channel 3.1/10.3 Gb/s Transceiver Macro with a Pattern-Tolerant Adaptive Equalizer”, ISSCC 2007, Feb. 14, 2007 (Yasuo Hidaka et al.). MAXIM, 10.7 Gbps Adaptive Receive Equalizer MAX3805 specification discloses an adaptive equalizer circuit that detects signal intensities by an analog circuit. However, since the adaptive equalizer circuit disclosed in MAXIM, 10.7 Gbps Adaptive Receive Equalizer MAX3805 specification detects signal intensities by comparing signal intensities in an analog circuit, signals need to be smoothed for a long period in order to improve comparison accuracy. A capacitor having large capacity is required to smooth signals for a long period, which may increase the circuit size. Further, it takes long time to perform signal comparison processing, which requires time to adjust equalizer intensity. Further, Robert Payne et al. discloses a receiver circuit that adjusts reception intensity based on a value of one reception data and a boundary value between data. However, in the receiver circuit disclosed in Robert Payne et al., only one reception data is considered. Thus, the reception intensity may be falsely judged. For example, in an input signal having a pattern in which 0 and 1 are repeated, there is no isolated pulse and the pulse width is kept constant. According to Robert Payne et al., the intensity of the equalizer circuit may be falsely detected, which may cause false adjustment of the reception intensity.
Yasuo Hidaka et al. discloses a receiver circuit that is capable of preventing false judgment of reception intensity. FIG. 11 shows a block diagram of a receiver circuit 100 disclosed in Yasuo Hidaka et al. As shown in FIG. 11, the receiver circuit 100 adjusts reception intensities of reception signals RXIP and RXIN in an equalizer. A signal output from the equalizer is output to a circuit located at the subsequent stage through a data reception sequence (Data). Further, the receiver circuit 100 detects the boundary value of the data items transmitted through the data reception sequence by a boundary value detection sequence (Boundary). The receiver circuit 100 then updates the gain code by an equalizer gain control circuit based on the value of the data and the boundary value of the data items, so as to adjust the gain of the equalizer.
Now, a gain control method in an equalizer gain control circuit of the receiver circuit 100 will be described. FIG. 12 shows a diagram showing a gain control flow in the equalizer gain control circuit. As shown in FIG. 12, the equalizer gain control circuit first selects a filter pattern FPi at random upon start of processing (step S1). The filter pattern FPi is prepared in advance, examples of which being shown in the table in FIG. 13. FIG. 13 shows four filter patterns FP0 to FP3. The equalizer gain control circuit refers to the values of the top data D0 to the last data D4 of the input data (reception pattern), and compares the selected filter pattern FPi with the reception data that is referred to (step S2). When the reception pattern matches the selected filter pattern FPi (YES in step S3), the equalizer gain is updated (step S4). This update process is performed based on an ISI level calculated based on the boundary value B3 between the reception data D3 and D4, and the value of the reception data D2. More specifically, when the boundary value B3 is in the low level (L) when the reception data D2 is in the low level (L), the ISI level indicates “under” which means the reception intensity is low, and the equalizer gain control circuit increases the equalizer gain. Further, when the boundary value B3 is in the high level (H) when the reception data D2 is in the low level (L), the ISI level indicates “over” which means the reception intensity is high, and the equalizer gain control circuit decreases the equalizer gain. Further, when the boundary value B3 is in the Low level (L) when the reception data D2 is in the high level (H), the ISI level indicates “over” which means the reception intensity is high, and the equalizer gain control circuit decreases the equalizer gain. Further, when the boundary value B3 is in the high level (H) when the reception data D2 is in the high level (H), the ISI level indicates “under” which means the reception intensity is low, and the equalizer gain control circuit increases the equalizer gain.
Although the receiver circuit 100 adjusts the equalizer gain while performing the reception operation as described above, the adjustment processing is executed irregularly when the filter pattern FPi randomly selected matches the reception data D0 to D4. FIG. 14 shows a timing chart showing a timing at which the adjustment processing is executed in the receiver circuit 100. Shown in FIG. 14 is an example in which the updating of the equalizer gain is performed at a timing at which samples 0 to 5 received at timings Φ0 to Φ5 match the filter pattern FPi that is selected at this time and the samples are received.